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| asix electronics corporation released date: 6/21/2005 4f, no. 8, hsin a nn rd., science-based industrial park, hsin-chu city , taiw an, r.o.c. tel: 886-3-579-9500 fa x: 886-3-579-9558 http://www.asix.com .tw/ AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller document no: ax 88178-07/ 6/ 21/ 05 features ? si ngl e chi p usb t o 10/ 100/ 1000 gi gabi t et hernet and hom e pna and hom e pl ug net w ork c ont rol l e r ? usb speci fi cat i on 1.0 and 1.1 and 2.0 com p l i a nt ? support s usb ful l and hi gh speed m odes wi t h bu s p o w er cap ab ility ? supports 4 endpoints on usb interface ? high perform ance packet transfer rate over usb bus usi ng propri e t a ry burst t r ansfer m echani s m (su b m itted fo r us p a ten t ap p licatio n ) ? ieee 802.3, 802.3u, and 802.3ab (10base-t, 100b ase-tx, and 1000b ase-t) com p at i b l e ? em bedded 20kb sr am for r x packet bufferi ng and 20kb sr am for tx packet bufferi ng ? support s bot h ful l - dupl ex and hal f-dupl ex operat i on i n fast et hernet ? provides mii/gmii/rgmii in terfaces for ethernet phy interface and mii interface for hom e pna/ hom e plug phy interface ? support s jum bo packet of up t o 9kb ? support s suspend m ode and r e m o t e w a keup vi a li nk-up, m a gi c packet , or ext e rnal pi n ? opt i onal phy power down duri ng suspend m ode ? support s 256/ 512 by t e s (93c56/ 93c66) of seri al eepr o m (for st ori ng usb descri pt ors) ? support s aut o m a t i c l o adi ng of et hernet id, usb descri pt ors and adapt e r c onfi gurat i on from eeprom after p o w er-o n in itializatio n ? external phy loop-back diagnostic capability ? int e grat es on-chi p 3.3v t o 2.5v vol t a ge regul at or and requi res onl y si ngl e power suppl y : 3.3v ? sm al l form fact or wi t h 128-pi n lqfp package ? 12mhz clock input from either crystal or oscillator source ? operating tem p erature range: 0 c to 7 0 c. *ieee is a registered tradem ark of the institute of electrical and electronic engineers, inc. *all other tr adem ar ks and r e gister ed tradem ark are the property of their r e spective holder s . product description the AX88178 usb t o 10/ 100/ 1000 gi gabi t et hernet / h om epna/ hom e pl ug cont rol l e r i s a hi gh perform ance and hi ghl y i n t e grat ed asic wi t h em bedded 40kb sr am for packet bufferi ng. it enables low cost and affordable gigabit ethernet net w ork connect i on t o deskt op, not ebook pc , and em bedded sy st em usi ng popul ar usb port s . it has an usb interface to com m uni cat e wi t h usb host cont rol l e r and i s com p l i a nt wi t h usb speci fi cat i on v1.0, v1.1 and v2.0. it i m pl em ent s 10/100/1000mbps ethern et lan function based on ieee802.3, ieee 802.3u, ieee802.3ab standards or hom e pna standard. it supports m e dia- independent interface (mii) to sim p lify the design on im plem enting fast ethernet and hom e pna functions. it also provides gigabit m e dia-independent (gm ii) and reduced giga bit m e dia-independent (rgmii) interface for interfacing w ith gigabit ethernet phy. system block diagram alway s contact asix for possible updates before starting a design. this data sheet contains new products inform ation. asix electr onics reserves the rights to m odify product speci fication without notice. no liability is assum e d as a result of the us e of this product. no rights under any pa tent accom p any the sale of the product. AX88178 10/ 100/ 1000 gi gabi t et hernet phy ma g n e tic r j 45 r j 11 ma g n e tic 1/ 10 m bps hom e lan phy eeprom usb i/f
AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller table of contents 1.0 introduction ................................................................................................................ 4 1.1 g ener al d e s cript ion ........................................................................................................... 4 1.2 AX88178 b loc k d iagram .................................................................................................... 4 1.3 AX88178 p inout d iagram ................................................................................................... 5 2.0 signal description .................................................................................................... 6 3.0 function description .............................................................................................. 9 3.1 usb c ore and i nter fac e .................................................................................................... 9 3.2 g igabit mac c ore ............................................................................................................... 9 3.3 s tation m anagem ent (sta) ............................................................................................... 9 3.4 m emory a rbit e r .................................................................................................................. 9 3.5 usb to e ther net b ridge ..................................................................................................... 9 3.6 s er ial eeprom l oader ..................................................................................................... 9 3.7 g ener al p urpose i/o ............................................................................................................ 9 4.0 serial eeprom memory map ............................................................................... 10 4.1 d etailed d e s cript ion ........................................................................................................ 11 5.0 usb configuration structure ......................................................................... 14 5.1 usb c onfiguration ........................................................................................................... 14 5.2 usb i nter fac e .................................................................................................................... 14 5.3 usb e ndpoints ................................................................................................................... 14 6.0 usb commands ............................................................................................................. 15 6.1 usb s tandard c ommands ................................................................................................ 15 6.2 usb v endor c ommands .................................................................................................... 16 6.2.1 d etailed r egister d e s cript ion .................................................................................... 17 6.2.2 r em ote w akeup d e s cript ion ........................................................................................ 25 6.3 i nt e rrupt e ndpoint ........................................................................................................... 25 7.0 electrical specifications ................................................................................. 26 7.1 dc c haracteristics .......................................................................................................... 26 7.1.1 a bsolute m aximum r atings ......................................................................................... 26 7.1.2 r ecommended o perating c ondition ........................................................................... 26 7.1.3 l eakage c urrent and c apacitance ............................................................................ 26 7.1.4 dc c har ac ter istic s of 2.5v i/o p ins ........................................................................... 27 7.1.5 dc c har ac ter istic s of 3.3v i/o p ins ........................................................................... 27 7.2 p ow er c onsumption ........................................................................................................... 27 7.3 p ow er - up s equence ............................................................................................................ 28 7.4 ac t im ing c har a c ter istic s .............................................................................................. 28 7.4.1 c loc k t im ing ................................................................................................................... 28 7.4.2 r eset t im ing .................................................................................................................... 29 7.4.3 gmii t im ing (1000m bps ) ................................................................................................ 29 7.4.4 rgmii t im ing .................................................................................................................. 30 7.4.5 mii t im ing (100m bps ) ..................................................................................................... 31 asix electronics corporation 2 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 7.4.6 s tation m anagem ent t im ing ........................................................................................ 32 7.4.7 s er ial eeprom t im ing .................................................................................................. 33 8.0 package information ............................................................................................ 34 9.0 ordering information .......................................................................................... 35 appendix a: system applications ................................................................................. 36 a.1 usb to g igabit e ther net c onver ter ................................................................................ 36 a.2 usb to g igabit e ther net and / or h ome lan c om b o solution ....................................... 36 revision history .................................................................................................................... 37 list of figures f igure 1: AX88178 b loc k d iagram ................................................................................................ 4 f igure 2: AX88178 p inout d iagram ................................................................................................ 5 f igure 3: m ultic a st f ilter e xample ............................................................................................ 21 list of tables t ab le 1: p inout d e s cript on ............................................................................................................. 6 t ab le 2: s er ial eeprom m em or y m ap ....................................................................................... 10 t ab le 3: usb s tandard c ommand r egister m ap ....................................................................... 15 t ab le 4: usb v endor c ommand r egister m ap .......................................................................... 16 t ab le 5: r em ote w akeup t rut h t able ........................................................................................ 25 asix electronics corporation 3 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 1.0 introduction 1.1 general description the AX88178 usb t o 10/ 100/ 1000 gi gabi t et hernet / h om epna/ hom e pl ug cont rol l e r i s a hi gh perform ance and hi ghl y i n t e grat ed asic wi t h em bedded 40kb sr am for packet bufferi ng. it enables low cost and affordable gigabit ethernet net w ork connect i on t o deskt op, not ebook pc , and em bedded sy st em usi ng popul ar usb port s . it has an usb interface to com m uni cat e wi t h usb host cont rol l e r and i s com p l i a nt wi t h usb speci fi cat i on v1.0, v1.1 and v2.0. it i m pl em ent s 10/100/1000mbps ethern et lan function based on ieee802.3, ieee 802.3u, ieee802.3ab standards or hom e pna standard. it supports m e dia- independent interface (mii) to sim p lify the design on im plem enting fast ethernet and hom e pna functions. it also provides gigabit m e dia-independent (gm ii) and reduced giga bit m e dia-independent (rgmii) interface for interfacing w ith gigabit ethernet phy. the AX88178 needs 12m hz cl ock for usb operat i on and 125m hz cl ock for gi gabi t et hernet operat i on. it i s i n 128-pi n lqfp l o w profi l e package wi t h c m os process and requi res onl y si ngl e 3.3v power suppl y t o operat e . 1.2 AX88178 block diagram gpio2~0 gi gabi t ma c co re mem o ry arb iter usb to ethernet b r i dge usb core and interface sta seeprom loader i/f 40kb sram general pur p ose i/ o eecs eeck eedi eedo m ii/gm ii/rgm ii i/f md c md i o dp/dm dprs/dm r s figure 1: AX88178 block diagram asix electronics corporation 4 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 1.3 AX88178 pinout diagram the AX88178 is housed in the 128-pin lqfp package. i n t_ re g u l a to r _ e n 1 234 567 89 1 0 1 1 1 2 1 3 1 4 1 5 1 6 33 34 35 36 37 38 39 40 41 42 43 as i x a x 88178 17 18 1 9 20 44 45 46 47 21 2 2 2 3 24 25 48 49 50 51 52 53 54 55 56 57 2 6 27 28 2 9 30 3 1 32 58 11 0 10 9 10 8 10 7 10 6 10 3 10 4 10 5 11 7 11 6 11 5 11 4 11 1 11 2 11 3 12 4 12 3 12 2 12 1 11 8 11 9 12 0 12 8 12 5 12 6 12 7 59 60 61 62 63 64 9 6 95 94 9 3 92 91 9 0 8 9 88 87 86 8 5 8 4 83 82 8 1 80 79 7 8 77 76 7 5 7 4 73 72 7 1 70 69 6 8 67 66 6 5 10 2 10 1 98 99 10 0 97 dmrs gn d vdd k vbu s t e s t s p eed up nc fo r c e f s _ n ext w a k eu p _ n gnd a h v dd3 sc a n _ t e s t sc a n _ e n a b l e c l k6 0 e xt cl k s el vd dk gn d eeck eecs eed i eedo vdd 3 v25 a gnd a vdd 3 tx _ c l k tx _ e n gt x_cl k tx c tx _ e r t xd0 t xd1 t xd2 t xd3 t xd4 t xd5 t xd6 t xd7 gn d av d d k xin 1 2 5 m rg m i i _ en a gnd v dd3 gnd v dd2 a gnd a vdd k db a vdd k a gnd nc nc a gnd nc nc nc nc vddk nc nc gn d vdd 2 vdd 2 rx _c l k rx _d v rx _er rxd 0 rxd 1 rxd 2 rxd 3 rxd 4 rxd 5 rxd 6 rxd 7 cr s col gnd mdint mdc md i o gp i o 0 gp i o 1 gp i o 2 gnd v dd3 ph y r s t _n nc nc nc nc nc u s b _ speed _ l ed le d gnd vd dk dp dm gn d gnd vd dk res e t _ n vdd a h gn d gn d xi n12 m xo ut 12 m av d d 3 ag n d rref a gnd rpu dp r s a vdd 3 gnd vdd 3 nc nc a vdd k a gnd a gnd a vdd k av d d k a gnd nc nc nc hs _ t e s t _ mo de i n t_ re g u l a to r _ e n 1 234 567 89 1 0 1 1 1 2 1 3 1 4 1 5 1 6 33 34 35 36 37 38 39 40 41 42 43 as i x a x 88178 17 18 1 9 20 44 45 46 47 21 2 2 2 3 24 25 48 49 50 51 52 53 54 55 56 57 2 6 27 28 2 9 30 3 1 32 58 11 0 10 9 10 8 10 7 10 6 10 3 10 4 10 5 11 7 11 6 11 5 11 4 11 1 11 2 11 3 12 4 12 3 12 2 12 1 11 8 11 9 12 0 12 8 12 5 12 6 12 7 59 60 61 62 63 64 9 6 95 94 9 3 92 91 9 0 8 9 88 87 86 8 5 8 4 83 82 8 1 80 79 7 8 77 76 7 5 7 4 73 72 7 1 70 69 6 8 67 66 6 5 10 2 10 1 98 99 10 0 97 dmrs gn d vdd k vbu s t e s t s p eed up nc fo r c e f s _ n ext w a k eu p _ n gnd a h v dd3 sc a n _ t e s t sc a n _ e n a b l e c l k6 0 e xt cl k s el vd dk gn d eeck eecs eed i eedo vdd 3 v25 a gnd a vdd 3 tx _ c l k tx _ e n gt x_cl k tx c tx _ e r t xd0 t xd1 t xd2 t xd3 t xd4 t xd5 t xd6 t xd7 gn d av d d k xin 1 2 5 m rg m i i _ en a gnd v dd3 gnd v dd2 a gnd a vdd k db a vdd k a gnd nc nc a gnd nc nc nc nc vddk nc nc gn d vdd 2 vdd 2 rx _c l k rx _d v rx _er rxd 0 rxd 1 rxd 2 rxd 3 rxd 4 rxd 5 rxd 6 rxd 7 cr s col gnd mdint mdc md i o gp i o 0 gp i o 1 gp i o 2 gnd v dd3 ph y r s t _n nc nc nc nc nc u s b _ speed _ l ed le d gnd vd dk dp dm gn d gnd vd dk res e t _ n vdd a h gn d gn d xi n12 m xo ut 12 m av d d 3 ag n d rref a gnd rpu dp r s a vdd 3 gnd vdd 3 nc nc a vdd k a gnd a gnd a vdd k av d d k a gnd nc nc nc hs _ t e s t _ mo de figure 2: AX88178 pinout diagram asix electronics corporation 5 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 2.0 signal description the fol l o wi ng abbrevi a t i ons appl y t o t h e fol l o wi ng pi n descri pt i on t a bl e. i2 input, 2.5v with 3.3v tolerant b2 bi -directional i/o, 2.5v with 3.3v tolerant i 3 i n p u t , 3 . 3 v b 5 bi-directiona l i/o, 3.3v with 5v tolerant i5 input, 3.3v with 5v tolerant pu internal pull up (75k) o2 output, 2.5v w i th 3.3v tol erant pd internal pul l dow n (75k) o3 output, 3.3v p power pin o5 output, 3.3v with 5v tolerant s schmitt trigger b b i - d i r e c t i o n a l i / o table 1: pinout description pin name t y pe pin no pin description usb interface dp b 3 2 usb 2 . 0 d a ta p o s itiv e p i n . dm b 31 usb 2.0 dat a negat i v e pi n. dprs b 36 usb 1.1 data positive pin. please connect to dp through a 39ohm (+/-1%) serial resistor. dm r s b 35 usb 1.1 dat a negat i v e pi n. pl ease connect t o dm t h rough a 39ohm (+/-1%) serial resistor. vb us i5/ p d/ s 10 vb us pi n i nput . pl ease connect t o usb bus power. xin12m i3 26 12mhz crystal or oscillator cl ock input. this clock is needed for usb phy tran sceiv e r to o p e rate. x o u t 1 2 m o 3 2 7 12mhz crystal or oscillator clock output. rref i 30 for usb phy? s i n t e rnal bi asi ng. pl ease connect t o agnd t h rough a 12.1kohm (+/ - 1%) resi st or . rpu i 34 for usb phy? s internal biasi ng. please connect to a vdd3 (3.3v) t h rough a 1.5kohm (+/ - 5%) resi st or . station management interface m d c o2 121 st at i on m a nagem e nt dat a c l ock out put . t he t i m i ng reference for m d io. al l dat a t r ansfers on m d io are sy nchroni zed t o t h e ri si ng edge of t h i s cl ock. the frequency of m d c i s 1.5m hz. m d i o b 2 / p u 1 2 0 st at i on m a nagem e nt dat a input / o ut put . s eri a l dat a i nput / out put transfers from /to the phys. the tran sfer prot ocol conform s t o t h e ieee 802.3u mii spec. m d int i2/ p u 1 17 st at i on m a nagem e nt int e rrupt i nput . mii/gmii/rgmii interface rx_clk i2 104 receive clock. rx _clk is received from phy to p rovi de t i m i ng reference for the transfer of rxd [7: 0 ] , r x _dv, and r x _er si gnal s on receive direction of mii/gmii/rgmii interface. rxd [7:0] i 2 1 14, 1 1 3 , 11 2 , 111 , 1 10, 109, 108, 107 receive data. rxd [7:0] is driv en synchronously with respect to r x _c lk by phy. in r g m ii m ode, onl y r xd [3: 0 ] i s used. rx_dv i2 105 receive data valid. r x_dv is driven synchronously with respect to r x _c lk by phy. it i s assert ed hi gh when val i d dat a i s present on rxd [7:0] . in rgm ii m ode, rx_dv acts as rx_ctl. r x _ e r i 2 1 0 6 receive error. rx_er is driven synchronously with respect to r x _c lk by phy. it i s assert ed hi gh for one or m o re r x _c lk peri ods t o i ndi cat e t o t h e m a c that an error has detected. col i2 1 1 6 co llisio n detected . col is d r iv en h i g h b y phy wh en th e co llisio n is detected. c r s i2 1 15 c a rri er sense. c r s i s assert ed hi gh asy n chronousl y b y the phy when either transm it or receive m e dium is non-idle. asix electronics corporation 6 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller tx_clk i2 102 transm it clock in mii m ode. tx_clk is received from phy t o provi de t i m i ng reference for t h e t r ansfer of txd [3: 0 ] , tx_en and tx_er signals on transm it direction of mii interface. gtx_c l k o2 91 transm i t c l ock i n gm ii m ode. gtx_c l k i s out put t o phy t o provi de t i m i ng reference for t h e t r ansfer of txd [7: 0 ] , tx_en and tx_er signals on transm it direction of gmii interface. txc o2 90 transm i t c l ock i n r g m ii m ode. txc i s out put t o phy t o provi de t i m i ng reference for t h e t r ansfer of txd [3: 0 ] , and tx_en si gnal s on transm it direction of rgmii interface. txd [7: 0 ] o2 76, 77, 78, 79, 82, 83, 84, 85 transm i t dat a . txd [7: 0 ] i s t r ansi t i oned sy nchronousl y wi t h respect t o t h e ri si ng edge of gtx_c l k i n gm ii m ode or ri si ng edge of tx_c lk i n m ii m ode. in r g m ii m ode, onl y txd [3: 0 ] i s used and i s t r ansi t i oned sy nchronousl y wi t h respect t o txc cl ock out put pi n. tx_en o2 89 transm i t enabl e . tx_en i s t r ansi t i oned s y n chronousl y wi t h respect t o t h e ri si ng edge of gtx_c l k i n gm ii m ode or ri si ng edge of tx_c lk i n m ii m ode. tx_en i s assert ed hi gh t o i ndi cat e a val i d txd [7: 0 ] . in r g m ii m ode, tx_en act s as tx_c tl and i s t r ansi t i oned sy nchronousl y wi t h respect t o txc cl ock out put pi n. tx_er o2 88 transm i t c odi ng error. tx_er i s t r ansi t i oned sy nchronousl y wi t h respect t o t h e ri si ng edge of gtx_c l k i n gm ii m ode or ri si ng edge of tx_c lk i n m ii m ode. w hen assert ed hi gh for one or m o re gtx_c l k/ tx_c lk, t h e phy shal l em i t one or m o re code-groups th at are n o t p a rt o f th e v a lid d a ta o r d e lim iter set so m e wh ere in th e fram e b e in g tran sm itted . serial eeprom interface eec k o5 4 eepr o m c l ock. eec k i s an out put cl ock t o eepr o m t o provi de tim ing reference for the transfer of eecs, eedi, and eedo signals. the frequency of eec k i s 187.5khz. eec s o5 5 eepr o m c h i p sel ect . eec s i s assert ed hi gh sy nchronousl y wi t h respect t o ri si ng edge of eec k as chip select signal. eedi o5 6 eeprom data in. eedi is the seri al out put dat a t o eepr o m ? s dat a i nput pi n and i s sy nchronous wi t h respect t o t h e ri si ng edge of eec k. eedo i5/ p d 9 eepr o m dat a out . eedo i s t h e seri al i nput dat a from eepr o m ? s dat a out put pi n. misc. pins xin125m i2 101 125m hz cl ock i nput . c onnect t o a 125m hz free run cl ock source when in gm ii or rgm ii m ode. in m ii m ode, connect to gnd t h rough a pul l - down resi st or . r e set_n i5/ p u/ s 12 c h i p r e set input . r e set_n pi n i s act i v e l o w. w h en assert ed, i t put s th e en tire ch ip in to reset state im m e d i ately. after co m p letin g reset, eeprom d a ta will b e lo ad ed au to m a tically. extw akeup_n i5/ p u/ s 1 1 r e m o t e -wakeup t r i gger from ext e rnal pi n. extw akeup_n shoul d be assert ed l o w for m o re t h an 2 cy cl es of 12m hz cl ock t o be effective. gpio [2: 0 ] b 5 / p d 1, 2, 3 general purpose inpu t / out put pi ns. t hese pi ns are defaul t as i nput pi ns aft e r power -on reset . pl ease use gpio0 for cont rol l i ng t h e power down pi n of ext e rnal et hernet phy . phyrst_n o2 122 phyrst_n is a tri-state out put used for resetting external ethernet phy. th is p i n is d e fau lt in tri-state after p o w er-o n reset. if ex tern al eth e rn et phy?s reset lev e l is activ e lo w, co n n ect th is to phy?s reset pi n wi t h a pul l e d-down resi st or. if i t ? s act i v e hi gh, connect t h i s t o phy with a p u lled - u p resisto r . th is way can m a k e su re th e ex tern al et hernet phy st ay s i n reset st at e before soft ware bri ngs i t out of reset . rgmii_en i3/pd 103 rgmii m ode enable. setti ng this pin high sets the ethernet phy interface into rgmii m ode. setting th is pin low sets the ethernet phy interface into mii or gmii m ode. asix electronics corporation 7 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller for c e fs_n i3/ p u 15 force usb ful l speed (act i v e l o w). for norm a l operat i on, user shoul d keep t h i s pi n nc t o enabl e usb hi gh speed handshaki ng process t o deci de t h e speed of usb bus. set t i ng t h i s pi n l o w set s t h e devi ce t o operat e at ful l speed m ode onl y and di sabl es c h i r p k (hs handshaki ng process). led o3 125 led i ndi cat or: w h en usb bus i s i n ful l speed, t h i s pi n dri v es hi gh cont i nuousl y . w h en usb bus i s i n hi gh speed, t h i s pi n dri v es l o w cont i nuousl y . thi s pi n dri v es hi gh and l o w i n t u rn (bl i nki ng) t o i ndi cat e tx dat a t r ansfer goi ng on whenever t h e host cont rol l e r sends bul k out dat a t r ansfer. usb_speed_le d o3 126 usb bus speed led i ndi cat or. w h en usb bus i s i n ful l speed, t h i s pi n dri v es hi gh cont i nuousl y . w h en usb bus i s i n hi gh speed, t h i s pi n dri v es l o w cont i nuousl y . testspeedup i3/ p d 13 test pi n. for norm a l operat i on, user shoul d keep t h i s pi n nc . hs_test_m ode i3/ p d 42 t e st pi n. for norm a l operat i on, user shoul d keep t h i s pi n nc . sc an_test i3/ p d 43 t e st pi n. for norm a l operat i on, user shoul d keep t h i s pi n nc . sc an_enab le i3/ p d 44 t e st pi n. for norm a l operat i on, user shoul d keep t h i s pi n nc . c l k60ext i3/ p d 45 t e st pi n. for norm a l operat i on, user shoul d keep t h i s pi n nc . c l ksel i3/ p d 46 t e st pi n. for norm a l operat i on, user shoul d keep t h i s pi n nc . db i2 65 debug pi n. for norm a l operat i on, user shoul d connect t o a vddk t h rough a pul l e d-up resi st or . on-chip regulator pins int_regulato r_ en i 20 on-chi p 3.3v t o 2.5v vol t a ge regul at or enabl e . c onnect t h i s pi n t o vddah di rect l y t o enabl e on-chi p regul at or . connect t h i s pi n t o gndah to disable on-chip regulator . vddah p 22 3.3v power suppl y t o on-chi p 3.3v t o 2.5v vol t a ge regul at or . gndah p 23 ground pi n of on-chi p 3.3v t o 2.5v vol t a ge regul at or . v25 p 21 2.5v vol t a ge out put of on-chi p 3.3v t o 2.5v vol t a ge regul at or . power and ground pins vddk p 16, 24, 74, 99, 1 18 dig ital co re po wer . 2 . 5 v . vdd2 p 80, 86, 123 di gi t a l i/ o power . 2.5v . vdd3 p 8, 19, 41, 97, 128 digital i/o power . 3.3v . gnd p 7, 17, 18, 25, 40, 75, 81, 87, 98, 100, 1 19, 124, 127 di gi t a l ground. avddk p 49, 53, 57, 64, 66, 68 anal og c o re power . 2.5v . avdd3 p 28, 37, 39 analog i/o power . 3.3v . agnd p 29, 33, 38, 50, 54, 55, 60, 63, 67, 69 anal og ground. asix electronics corporation 8 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 3.0 function description 3.1 usb core and interface the usb core and interface contains an usb 2.0 transcei ver, serial interface engine (sie), usb bus protocol handshaki ng bl ock, usb st andard com m a nd, vendor com m a nd regi st ers, l ogi c for support i ng bul k t r ansfer, and i n t e rrupt transfer, etc. the usb interface is used to com m unicate with usb host c ontroller and is com p liant with usb specification v1.0, v1.1 and v2.0. 3.2 gigabit mac core the gigabit mac core supports ieee 802.3, 802.3u, and 802.3a b mac sub-layer functions, such as basic mac fram e receive and transm it, crc checking and generation, filteri ng, forwarding, flow-contro l in full-duplex m ode, and collision-detection and handling in hal f-duplex m ode, etc. it pr ovides gigabit m e dia-indepe ndent (gmii) and reduced gigabit m e dia-independent (r gmii) interface for interfacing w ith gigabit ethernet phy. 3.3 station management (sta) the station m a nagem e nt interface provides a sim p le, two-wire, serial interface to connect to a m a naged phy device for the purposes of controlling the phy and gathering status from the phy. the station m a nagem e nt interface allows co m m u n i catin g with m u ltip le phy d e v i ces at th e sam e tim e b y id en tifyin g th e m a n a g e d phy with 5 - b it, u n i q u e ph y id. 3.4 memory arbiter the m e m o ry arbiter block is responsible for storing received mac fram e s into on-chip sram (packet buffer) and then forwardi ng t o usb bus upon request from usb host vi a bul k i n t r ansfer. it al so m oni t o rs packet buffer usage i n ful l - dupl ex m ode for t r i ggeri ng pause fram e t r ansm i ssi on out on tx di rect i on. the m e m o ry arbi t e r bl ock i s al so responsible for storing mac fram e s received from usb host via bulk out transfer and wa iting to be transm itted out t o wards et hernet net w ork. 3.5 usb to ethernet bridge the usb t o et hernet bri dge bl ock i s responsi b l e for conve rt i ng et hernet m a c fram e i n t o usb packet s or vi ce-versa. this block supports proprietary burst transfer m echanism (s ubm itted for us patent applica tion) to offload software burden and t o offer very hi gh packet t r ansfer t h roughput over usb bus. 3.6 serial eeprom loader the seri al eepr o m l o ader i s responsi b l e for readi ng confi gurat i on dat a aut o m a t i cal l y from ext e rnal seri al eepr o m aft e r power-on reset . 3.7 general purpose i/o there are 3 general purpose i/ o pi ns provi ded by t h i s asic . asix electronics corporation 9 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 4.0 serial eeprom memory map eeprom offset high byte low byte 00h r e served w o rd c ount for prel oad 0 1 h f l a g 02h lengt h of hi gh-speed devi ce descri pt or (by t es) eepr o m offset of hi gh-speed devi ce descri pt or 03h lengt h of hi gh-speed c onfi gurat i on descri pt or (by t es) eepr o m offset of hi gh-speed c onfi gurat i on descri pt or 04h node id 1 node id 0 05h node id 3 node id 2 06h node id 5 node id 4 07h language id hi gh b y t e language id low b y t e 08h lengt h of m a nufact ure st ri ng (by t es) eepr o m offset of m a nufact ure st ri ng 09h lengt h of product st ri ng (by t es) eepr o m offset of product st ri ng 0ah lengt h of seri al num b er st ri ng (by t es) eepr o m offset of seri al num b er st ri ng 0b h lengt h of c onfi gurat i on st ri ng (by t es) eepr o m offset of c onfi gurat i on st ri ng 0ch length of interface 0 string (bytes ) eeprom offset of interface 0 string 0dh length of interface 1/0 string (bytes) eeprom offset of interface 1/0 string 0eh length of interface 1/1 string (bytes) eeprom offset of interface 1/1 string 0fh phy r e gi st er offset for int e rrupt endpoi nt phy r e gi st er offset for int e rrupt endpoi nt 10h max packet size high byte max packet size low byte 11h secondary phy _ ty pe [7: 5 ] and phy _ id [4: 0 ] pri m ary phy _ ty pe [7: 5 ] and phy _ id [4: 0 ] 12h pause fram e high w a ter mark pause fram e low w a ter mark 13h lengt h of ful l - speed devi ce descri pt or (by t es) eepr o m offset of ful l - speed devi ce descri pt or 14h lengt h of ful l - speed c onfi gurat i on descri pt or (by t es) eepr o m offset of ful l - speed c onfi gurat i on descri pt or 1 5 h - 1 f h r e s e r v e d r e s e r v e d table 2: serial eeprom mem o ry map asix electronics corporation 10 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 4.1 detailed description the fol l o wi ng sect i ons provi de det a i l e d descri pt i on for som e of the field in serial eeprom m e m o ry m a p, for other fields not covered here, pl ease refer t o AX88178l appl i cat i on not e for m o re det a i l s . 4.1.1 word count for preload (00h) the num ber of words t o be prel oaded by t h e eepr o m l o ader = 15h. 4.1.2 flag (01h) bit 1 5 bit 1 4 bit 1 3 bit 1 2 bit 1 1 bit 1 0 bit 9 bit 8 reserv ed t d p e c e m bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 t a c e r d c e s c p r d c k 1 r w u reserv ed s p sp: self-power (for usb getstatus) 1: sel f power. 0: b u s power. r w u: r e m o t e w a keup support . 1: indi cat e t h at t h i s devi ce support s r e m o t e w a keup. 0: not support . dck: disable chirp k. 1: di sabl ed. 0: enable. scpr: software control phy reset. 1: the pr l and pr te bi t s of soft ware r e set r e gi st er cont rol t h e phyr st_n out put l e vel . 0: the usb reset on usb bus and pr te bi t of soft ware r e set r e gi st er cont rol t h e phyr st_n out put l e vel . rdce: rx dro p crc en ab le. 1: crc byte is dropped on receive d mac fram e forwarding to host. 0: crc byte is not dropped. t a ce: tx ap p e n d crc en ab le. 1 : crc b y te is g e n e rated an d ap p e n d e d b y th e asic fo r ev ery tran sm itted mac fram e . 0 : crc b y te is n o t ap p e n d e d . c e m : c a pt ure effect i v e m ode. 1: capture effective m ode enable. 0: di sabl ed. tdpe: test debug port enabl e . 1: enabl e t e st debug port for chi p debug purpose. 0: di sabl e t e st debug port and t h e chi p operat e i n norm a l funct i on m ode b i t 1, 10~ 15: r e served. 4.1.3 node id (04~06h) the node id 0 t o 5 by t e s represent t h e m a c address of t h e devi ce, for exam pl e, i f m a c address = 01-23-45-67-89-ab h, t h en node id 0 = 01, node id 1 = 23, node id 2 = 45, node id 3 = 67, node id 4 = 89, and node id 5 = ab . asix electronics corporation 11 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 4.1.4 phy register offset for interrupt endpoint (0fh) bit 1 5 bit 1 4 bit 1 3 bit 1 2 bit 1 1 bit 1 0 bit 9 bit 8 reserved phy register of fset 1 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 reserved phy register of fset 2 phy register offset 1: fill in phy? s register offset of prim ary phy here . upon each interrupt endpoint issued, its register value will be reported in byte # 5 and 6 of interr upt endpoint packet. phy register offset 2: fill in phy?s register offset of prim ary phy here. upon each interrupt endpoint issued, its register value will be reported in byte # 7 and 8 of interr upt endpoint packet. 4.1.5 max packet siz e high/low byte (10h) fill in this field the m a xim u m rx/tx mac fram e size supported by this asic when jum bo fram e m ode is disabled. the num ber m u st be even num ber i n t e rm s of by t e and shoul d be l e ss t h an or equal t o 2500 by t e s. w h en jum bo fram e m o d e is enabled, the m a xim u m mac fram e size is fi xed to 9216 bytes and this setting is ignored. 4.1.6 primary/secondary phy_type and phy_id (11h) the 3 bi t s phy _ ty pe fi el d for bot h pri m ary and secondary phy i s defi ned as fol l o ws, 3?b000: 10/ 100 et hernet phy or 1m hom e phy (li nk report s as norm a l case). 3?b100: speci al case 1 (li nk report s as al way s act i v e). 3?b001: gi gabi t et hernet phy . 3?b111: non-support e d phy . for exam pl e, t h e hi gh b y t e val u e of ?e0h? i n eepr o m offset of ?11h? m eans t h at secondary phy i s not support e d. 4.1.7 pause frame high water and low water mark (12h) w h en operating in full-duplex m ode, correct setting of this field is very im porta nt and can affect the overall packet receive throughput perform ance in a great d eal. the high w a ter mark is the thres hold to trigger sending of pause fram e and the low w a ter mark is the threshold to stop sending of pause fram e . note that each free buffer count here represents 256 bytes of packet storage space in sram. tot a l free buffer count = 80 sto p sendi n g pause fram e when free buffer > low w a ter m a r k st art sendi n g pause fram e when free buffer < hi g h w a t e r m a r k 0 w h en ju m b o fram e m o d e is n o t d i sab l ed , u s er can fill in a sm aller v a lu e in hig h w a ter mark an d a larg er v a lu e in lo w w a ter m a rk fields to have m o re effici ent use of sr am for packet bufferi ng. asix electronics corporation 12 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 4.1.8 pow er-up steps after p o w er-o n reset, th e asic will au to m a tically p e rfo rm fo llo win g step s to th e eth e rn et ph ys v i a mdc/mdio lin es, 1. w r i t e t o phy _ id of 00h wi t h phy regi st er offset 00h t o power down al l phy s at t ached t o st at i on m a nagem e nt interface. 2. w r i t e t o pri m ary phy _ id wi t h phy regi st er offset 00h t o power down pri m ary phy . 3. w r i t e t o secondary phy _ id wi t h phy regi st er offset 00h t o power down secondary phy . asix electronics corporation 13 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 5.0 usb configuration structure 5.1 usb configuration the AX88178 support s 1 c onfi gurat i on onl y . 5.2 usb interface the AX88178 supports 1 interface. 5.3 usb endpoints the AX88178 support s fol l o wi ng 4 endpoi nt s: endpoi nt 0: c ont rol endpoi nt . it i s used for confi guri ng t h e devi ce, e.g., st andard com m a nds and vendor com m a nds, etc. endpoi nt 1: int e rrupt endpoi nt . it i s used for report i ng st at us. endpoint 2: bulk in endpoi nt. it is used for r eceiving ethernet packet. endpoint 3: bulk out endpoi nt. it is used for tran sm itting ethernet packet. asix electronics corporation 14 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 6.0 usb commands there are t h ree com m a nd groups for endpoi nt 0 (c ont rol endpoi nt ) i n AX88178: the usb st andard com m a nds the usb vendor com m a nds the usb c o m m uni cat i on c l ass com m a nds 6.1 usb standard commands the language id i s 0x0904 for engl i s h ppll m eans buffer l e ngt h c c m eans confi gurat i on num ber i i m eans interface num ber aa m eans device address setup command data bytes access ty pe description 8006_00 01 00 00 llpp ppll by t e s i n dat a st age r ead get devi ce descri pt or 8006_0002 0000_llpp ppll by t e s i n dat a st age r ead get c onfi gurat i on descri pt or 8006_0003_0000_llpp ppll by t e s i n da t a st age r ead get support e d language id 8006_0103_0904_llpp ppll by t e s i n dat a st age r ead get m a nufact ure st ri ng 8006_0203_0904_llpp ppll by t e s i n dat a st age r ead get product st ri ng 8006_0303_0904_llpp ppll by t e s i n da t a st age r ead get seri al num b er st ri ng 8006_0403_0904_llpp ppll by t e s i n dat a st age r ead get c onfi gurat i on st ri ng 8 0 0 6 _ 0 5 0 3 _ 0 9 0 4 _ l l p p p p l l by tes in data stage read get interface 0 string 8 0 0 6 _ 0 6 0 3 _ 0 9 0 4 _ l l p p p p l l by tes in data stage read get interface 1/0 string 8 0 0 6 _ 0 7 0 3 _ 0 9 0 4 _ l l p p p p l l by tes in data stage read get interface 1/1 string 8008_0000_0000_0100 1 by t e s i n dat a st age r ead get c onfi gurat i on 0009_c c 00_0000_0000 no dat a i n dat a st age w r i t e set c onfi gurat i on 810a_0000 _i i00_0100 1 bytes in data stage read get interface 010b_as00_0000_0000 no data in data stage w r ite set interface 0005_aa00_0000_0000 no dat a i n dat a st age w r i t e set address table 3: usb standard com m a nd register map asix electronics corporation 15 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 6.2 usb vendor commands no setup command data bytes access ty pe description 1 . c 002_aa0b _0c 00_0800 8 b y tes in data stag e r ead rx /tx sram read register 2. 4003_aa0b _0c 00_0800 8 by t e s i n dat a st age w ri t e r x / t x sr am w r i t e r e gi st er 3. 4006_0000_0000_0000 no dat a i n dat a st age w ri t e soft ware seri al m a nagem e nt c ont rol reg i ster 4. c 007_ aa00_c c 00_0200 2 by t e s i n dat a st age r ead phy r ead r e gi st er 5. 4008 _aa00_c c 00_0200 2 by t e s i n dat a st age w ri t e phy w r i t e r e gi st er 6. c 009_0000_0000_0100 1 by t e s i n dat a st age r ead se ri al m a nagem e nt st at us r e gi st er 7. 400a_0000_0000_0000 no dat a i n dat a st age w ri t e hardware seri al m a nagem e nt c ont rol reg i ster 8. c 00b _aa00_0000_0200 2 by t e s i n dat a st age r ead sr om r ead r e gi st er 9. 400c _aa00_c c dd_0000 no dat a i n dat a st age w ri t e sr om w r i t e r e gi st er 10. 400d_0000_0000_0000 no dat a i n dat a st age w ri t e sr om w r i t e enabl e r e gi st er 11. 400e_0000_0000_0000 no dat a i n dat a st age w ri t e sr om w r i t e di sabl e r e gi st er 12. c 00f_0000_0000_0200 2 by t e s i n dat a st age r ead r x c ont rol r e gi st er 13. 4010_aab b _0000_0000 no dat a i n dat a st age w ri t e r x c ont rol r e gi st er 14. c 011_0000_0000_0300 3 by t e s i n dat a st age r ead ipg/ ipg1/ i pg2 r e gi st er 15. 4012_aab b _ c c 00_0000 no dat a i n dat a st age w ri t e ipg/ ipg1/ i pg2 r e gi st er 16. c 013_0000_0000_0600 6 by t e s i n dat a st age r ead node id r e gi st er 17. 4014_0000_0000_0600 6 by t e s i n dat a st age w ri t e node id r e gi st er 18. c 015_0000_0000_0800 8 by t e s, ma0~ma7 , in data stage read mu lticast filter array reg i ster 19. 4016_0000_0000_0800 8 by t e s, ma0~ma7 , in data stage w r ite mu lticast filter array reg i ster 20. 4017_aa00_0000_0000 no dat a i n dat a st age w ri t e test r e gi st er 21. c 019_0000_0000_0200 2 by t e s i n dat a st age r ead et hernet / h om epna phy address reg i ster 22. c 01a_0000_0000_0200 2 by t e s i n dat a st age r ead m e di um st at us r e gi st er 23. 401b _aab b _0000 _0000 no dat a i n dat a st age w ri t e m e di um m ode r e gi st er 24. c 01c _0000_0000_0100 1by t e s i n dat a st age r ead m oni t o r m ode st at us r e gi st er 25. 401d_aa00_0000_0000 no dat a i n dat a st age w ri t e m oni t o r m ode r e gi st er 26. c 01e _0000_0000_0100 1 by t e s i n dat a st age r ead gpios st at us r e gi st er 27. 401f_aa00_0000_0000 no dat a i n dat a st age w ri t e gpios r e gi st er 28. 4020_aa00_0000_0000 no dat a i n dat a st age w ri t e soft ware r e set r e gi st er table 4: usb vendor com m a nd register map asix electronics corporation 16 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 6.2.1 detailed register description 6.2.1.1 rx/tx sram read register (02h, read only) bit7 bit6 b i t 5 bit4 bit3 bit2 bit1 b i t 0 aa [7:0] reserv ed b [3 :0 ] 0 h c [3: 0 ] dd [7 :0 ] in data stag e ee [7 :0 ] in data stag e ff [7 :0 ] in data stag e gg [7 :0 ] in data stag e hh [7 :0 ] in data stag e ii [7 :0 ] in data stag e jj [7 :0 ] in data stag e kk [7 :0 ] in data stag e {b [3 :0 ], aa [7 :0 ]}: th e read address of r x or tx sr am . c [0 ]: ram selectio n . 0: indicates to read from rx sram. 1: indicates to read from tx sram. c [3 :1 ]: reserv ed . {dd [7 :0 ], ee [7 :0 ], ff [7 :0 ], gg [7 :0 ], hh [7 :0 ], ii [7 :0 ], jj [7 :0 ], kk [7 :0 ]}: th e 6 4 - b its o f d a ta p r esen ted in data stag e are th e d a ta to b e written to rx o r tx sram. 6.2.1.2 rx/tx sram w r ite register (03h, write only) bit7 bit6 b i t 5 bit4 bit3 bit2 bit1 b i t 0 aa [7:0] reserv ed b [3 :0 ] reserv ed c [3 :0 ] dd [7 :0 ] in data stag e ee [7 :0 ] in data stag e ff [7 :0 ] in data stag e gg [7 :0 ] in data stag e hh [7 :0 ] in data stag e ii [7 :0 ] in data stag e jj [7 :0 ] in data stag e kk [7 :0 ] in data stag e {b [3 :0 ], aa [7 :0 ]}: th e write ad d r ess o f rx o r tx sram. c [0 ]: ram selectio n . 0 : in d i cates to write to rx sram. 1 : in d i cates to write to tx sram. c [3 :1 ]: reserv ed . {dd [7 :0 ], ee [7 :0 ], ff [7 :0 ], gg [7 :0 ], hh [7 :0 ], ii [7 :0 ], jj [7 :0 ], kk [7 :0 ]}: th e 6 4 - b its o f d a ta p r esen ted in data stag e are th e d a ta to b e written to rx o r tx sram. 6.2.1.3 software serial managem e nt c ontrol register (06h, write only) w h en software needs to access to ethernet phy?s internal registers, one has to first issue this com m a nd to request the ownership of serial manage m e nt interface. the ownership status of the interface can be retrieved from serial m a nagem e nt st at us r e gi st er. asix electronics corporation 17 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 6.2.1.4 phy read register (07h, read only) bit7 bit6 b i t 5 bit4 bit3 bit2 bit1 b i t 0 aa [7:0] 00h cc [7 :0 ] aa [4:0] : the phy id value. c c [4: 0 ] : the regi st er address of ethernet phy?s internal register. aa [7:5] : reserved cc [7 :5 ]: reserv ed 6.2.1.5 phy w r ite register (08h, write only) bit7 bit6 b i t 5 bit4 bit3 bit2 bit1 b i t 0 aa [7:0] 00h cc [7 :0 ] aa [4:0] : the phy id value. c c [4: 0 ] : the regi st er address of ethernet phy?s internal register. aa [7:5] : reserved cc [7 :5 ]: reserv ed 6.2.1.6 serial managem e nt status register (09h, read only) bit7 bit6 b i t 5 bit4 bit3 bit2 bit1 b i t 0 r e s e r v e d h o s t _ e n host_en: host access enable. software can read this register to determ ine the current ownership of serial managem e nt interface. 1: software is allowed to access ethern et phy?s internal registers via phy r ead register or phy w r ite registers. 0: asic?s hardware owns the serial managem e nt interface and so ftware?s access is ignored. 6.2.1.7 hardware serial managem e nt c ontrol register (0ah, write only) w h en software is done accessing serial managem e nt interface, one needs to issue this com m a nd to release the ownership of the interface back to asic?s hardware. afte r issuing this com m a nd, follo wing phy read register or phy w r ite register from software will be ignored. note : soft ware shoul d i ssue t h i s com m a nd every t i m e aft e r finished accessing serial manage m e nt interface to release the ownership back to hardware to allow periodic interrupt endpoint to be able to access the ethernet phy?s registers via the serial managem e nt interface. 6.2.1.8 srom read register (0bh, read only) bit7 bit6 b i t 5 bit4 bit3 bit2 bit1 b i t 0 aa [7:0] aa [7:0]: the read address of serial eerom. asix electronics corporation 18 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 6.2.1.9 srom w r ite register (0ch, write only) bit7 bit6 b i t 5 bit4 bit3 bit2 bit1 b i t 0 aa [7:0] 00h cc [7 :0 ] dd [7:0] aa [7:0] : the write address of serial eerom . { dd [7 :0 ], cc [7 :0 ] }: th e write d a ta v a lu e o f serial eerom 6.2.1.10 w r ite srom enable (0dh, write only) user issu es th is co m m a n d to en ab le write p e rm issio n to serial eeprom fro m srom w r ite reg i ster. 6.2.1.11 w r ite srom disable (0eh, write only) user issu es th is co m m a n d to d i sab l e write p e rm issio n to serial eeprom fro m srom w r ite reg i ster. 6.2.1.12 rx control register (0fh, read only and 10h, write only) bit7 bit6 b i t 5 bit4 bit3 bit2 bit1 b i t 0 s o r e s e r v e d a p am a b s e p am all p r o 0 h r e s e r v ed m f b [1 :0 ] aa [7:0] = { so, reserved, ap, am, ab, reserved, amall, pro } bb [7 :0 ] = { 0 h , reserv ed [3:2] , sb [1:0] } pro: packet_type_prom i scuous. 1: all fram e s received by the asic are forwarded up toward the host. 0: disabled (default). amall: packet_type_all_multicast. 1: all m u lticast fram e s received by the asic are forw arded up toward the host, not just the fram e s whose scram b lin g resu lt o f da m a tch i n g with m u lticast ad d r ess list p r o v i d e d in mu lticast filter array reg i ster. 0 : disab l ed . th is o n l y allo ws m u lticast fram e s wh o s e scram b lin g resu lt o f da field m a tch i n g with m u lticast ad d r ess list p r o v i d e d in mu lticast filter array reg i ster to b e fo rward e d u p to ward th e h o s t (d efau lt). sep: save error packet. 1: received packets with crc error ar e saved and forwarded to the host anyway. 0: received packets with crc error are discarded auto m a tically without forwardi ng to the host (default). ab: packet_type_broadcast. 1: all broadcast fram e s received by the asic are forwarded up toward the host (default). 0: di sabl ed. am: packet_type_multicast. 1 : all m u lticast fram e s wh o s e scram b lin g resu lt o f da m a tch i n g with m u lticast ad d r ess list are fo rward e d u p to th e h o s t (d efau lt). 0: di sabl ed. ap: accept physical address from multicast filter array. 1: al l o w uni cast packet s t o be forwarded up t o ward host i f t h e l ookup of scram b l i ng resul t of da i s found wi t h i n m u lticast ad d r ess list. 0: disabled, that is, unicast pack ets filtering are done without regard ing m u lticast address list (default). so: start op eratio n . 1: et hernet m a c st art operat i ng. 0: et hernet m a c st op operat i ng (defaul t ) . asix electronics corporation 19 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller mfb [1:0]: maxim u m fram e burst transfer on usb bus. 00: 2048 b y t e s 01: 4096 b y t e s 10: 8192 b y t e s 1 1 : 16384 b y t e s (defaul t ) . user shoul d set t o t h i s val u e when jum bo packet m ode i s enabl e d t o gai n bet t e r t r ansfer t h roughput on usb bus. 6.2.1.13 ipg/ipg1/ipg2 control register (11h, read only and 12h, write only) bit7 bit6 b i t 5 bit4 bit3 bit2 bit1 b i t 0 aa [7:0] bb [7 :0 ] cc [7 :0 ] aa [6:0] = ipg [6:0] . bb [6:0] = ipg1 [6:0] . cc [6:0] = ipg2 [6:0] . ipg [6: 0 ] : int e r packet gap for back-t o-back t r ansfer on tx di rect i on i n m ii m ode (defaul t = 15h). ipg1 [6:0] : ipg part1 value (default = 0ch). ipg2 [6: 0 ] : ipg part 1 val u e + part 2 val u e (defaul t = 12h). aa [7] : reserved. bb [7 ]: reserv ed . cc [7 ]: reserv ed . 6.2.1.14 node id register (13h, read only and 14h, write only) bit7 bit6 b i t 5 bit4 bit3 bit2 bit1 b i t 0 aa [7:0] bb [7 :0 ] cc [7 :0 ] dd [7:0] ee [7:0] ff [7:0] aa [7:0] = noid 0. bb [7:0] = noid 1. cc [7:0] = noid 2. dd [7:0] = noid 3. ee [7:0] = noid 4. ff [7:0] = noid 5. {ff [7: 0 ] , ee [7: 0 ] , dd [7: 0 ] , c c [7: 0 ] , b b [7: 0 ] , aa [7: 0 ] } = et hernet m a c address [47: 0] of t h e node. asix electronics corporation 20 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 6.2.1.15 multicast filter array (15h, read only and 16h, write only) bit7 bit6 b i t 5 bit4 bit3 bit2 bit1 b i t 0 ma 0 [ 7 :0 ] ma 1 [ 7 :0 ] ma 2 [ 7 :0 ] ma 3 [ 7 :0 ] ma 4 [ 7 :0 ] ma 5 [ 7 :0 ] ma 6 [ 7 :0 ] ma 7 [ 7 :0 ] {m a7 [7:0] , m a 6 [7:0] , m a 5 [7:0] , m a 4 [7:0] , m a 3 [7 :0 ], ma2 [7 :0 ], ma1 [7 :0 ], ma0 [7 :0 ]} = th e m u lticast ad d r ess b it m a p fo r m u lticast fram e filterin g b l o c k . see fig u r e 3 : mu lticast filter ex am p l e, fo r ex am p l e. crc3 2 {crc31, 30, 29, 28, 27, 26} address[5: 0] = 1ah m a r [ 63: 0] = 400_0000h da 81 81 81 81 81 81 figure 3: multicast filter exam ple 6.2.1.16 test register (17h, write only) bit7 bit6 b i t 5 bit4 bit3 bit2 bit1 b i t 0 mm [ 7 :6 ] ld rn d ldr nd: load r a ndom num ber i n t o m a c ? s exponent i a l back-off t i m er. user wri t e s a ?1? t o enabl e t h e asic t o l o ad a sm all random num ber into mac?s back-off tim er to shorten the back-off duration in each retry after co llisio n . th is reg i ster is u s ed fo r test p u r p o s e. defau lt v a lu e = 0 . m m [7:6] : reserved. 6.2.1.17 ethernet / hom e pna phy address register (19h, read only) bit7 bit6 b i t 5 bit4 bit3 bit2 bit1 b i t 0 secphyt y pe [2:0] secphyid [4:0] priph y t y p e [2 :0 ] priph y id [4 :0 ] secphy ty pe, secphy id: the secondary phy address l o aded from seri al eepr o m ? s offset address 11h. pri p hy ty pe, pri p hy id: the pri m ari l y phy address l o aded from seri al eepr o m ? s offset address 11h. asix electronics corporation 21 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 6.2.1.18 medium status register (1ah, read only) and medium mode register (1bh, write only) bit7 bit6 b i t 5 bit4 bit3 bit2 bit1 b i t 0 p f j f e t f c r f c e n c k a c f d g m r e s e r v e d s m s b p reserved p s r e aa [7: 0 ] = {pf, jfe, tfc , r f c , en125, ac , fd, gm }. bb [7:0] = {reserved, sm, sbp, je, ps, re}. gm : gi gabi t m ode. 1: gm ii m ode. 0: m ii m ode (defaul t ) . ps: port speed in mii m ode 1: 100 m bps (defaul t ) . 0: 10 m bps. {gm, ps} rgm ii/m ii/gm ii port speed selection 00: 10m bps 01: 100m bps 10: 1000m bps 11: 1000m bps fd: ful l dupl ex m ode 1: ful l dupl ex m ode (defaul t ) . 0: hal f dupl ex m ode. ac: reserv ed b it. fo r n o r m a l o p e ratio n , p l ease always write 1 to th is b it. enc k : enabl e gtx_c l k and txc cl ock out put s 1: enable. 0: disabled (default). enck rgmii_en gtx_clk txc 0 0 off off 0 1 off off 1 0 on off 1 1 off on rfc: rx flo w co n t ro l en ab le. 1: enable receiving of pause fram e on rx direction during full duplex m ode (default). 0: di sabl ed. tfc : tx fl ow c ont rol enabl e . 1: enable transm itting pause fram e on tx direction during full duplex m ode (default). 0: di sabl ed. jfe: jum bo fram e enable. 1: enabl e t h e support of jum bo fram e i n gi gabi t m ode (defaul t ) . 0: di sabl ed. pf: c h eck onl y ?l engt h/ t y p e? field for pause fram e. 1: enabl e , i . e., pause fram e s are i d ent i f i e d onl y based on l/ t fi l e d. 0: di sabl ed, i . e., pause fram e s are i d ent i f i e d based on bot h da and l/ t fi el ds (defaul t ) . re: receive enable. 1: enable rx path of the asic. 0: disabled (default). sbp: stop backpressure. 1: w h en tfc bi t = 1, set t i ng t h i s bi t enabl e s backpressure on tx di rect i on ?cont i nuousl y ? duri ng r x buffer ful l condi t i on i n hal f dupl ex m ode. 0 : w h en tfc b it = 1 , settin g th is b it en ab le b ack p r essu re o n tx d i rectio n ?in t erm itten tly? d u r in g rx b u ffer fu ll condi t i on i n hal f dupl ex m ode (defaul t ) . sm : super m ac support . 1: enabl e super m ac t o short e n exponent i a l back-off t i m e duri ng t r ansm i t ret r y . 0: disabled (default). asix electronics corporation 22 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 6.2.1.19 monitor mode status register (1ch, read only) bit7 bit6 b i t 5 bit4 bit3 bit2 bit1 b i t 0 reser v ed u s reser v ed r w m p r w lu mo m mo m: mo n ito r mo d e . 1: enable. all received packets will be ch ecked on da and crc but not buffered into m e m o ry. 0: disabled (default). r w lu: r e m o t e w a keup t r i gger by et hernet li nk-up. 1: enable 0: disabled (default). r w m p : r e m o t e w a keup t r i gger by m a gi c packet . 1: enabl e 0: disabled (default). us: usb speed. 1: high speed m ode. 0: fs speed m ode. 6.2.1.20 monitor mode register (1dh, write only) bit7 bit6 b i t 5 bit4 bit3 bit2 bit1 b i t 0 reser v ed r w m p r w lu mo m mo m: mo n ito r mo d e . 1: enable. all received packets will be ch ecked on da and crc but not buffered into m e m o ry. 0: disabled (default). r w lu: r e m o t e w a keup t r i gger by et hernet li nk-up. 1: enable. 0: disabled (default). r w m p : r e m o t e w a keup t r i gger by m a gi c packet . 1: enable. 0: disabled (default). aa [7:3] : reserved. 6.2.1.21 gpio status register (1eh, read only) bit7 bit6 bit5 b i t 4 bit3 bit2 bit1 b i t 0 g p i _ 2 gpo_2_en g pi_1 gpo_1_en g pi_0 g p o _ 0 _ e n gpo_0_en: c u rrent l e vel of pi n gpio0? s out put enabl e . gpi_0: input l e vel on gpio0 pi n when gpio0 i s as an i nput pi n. gpo_1_en: c u rrent l e vel of pi n gpio1? s out put enabl e . gpi_1: input l e vel on gpio1 pi n when gpio1 i s as an i nput pi n. gpo_2_en: c u rrent l e vel of pi n gpio2? s out put enabl e . gpi_2: input l e vel on gpio2 pi n when gpio2 i s as an i nput pi n. asix electronics corporation 23 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 6.2.1.22 gpio register (1fh, write only) bit7 bit6 b i t 5 bit4 bit3 bit2 bit1 b i t 0 r s e r e s e r v e d g p o _ 2 gpo2en g p o _ 1 gpo1en g p o _ 0 g p o 0 e n gpo0en: pin gpio0 output enable. 1: out put i s enabl e d (m eani ng gpio0 i s used as an out put pi n). 0: out put i s t r i - st at ed (m eani ng gpio0 i s used as an i nput pi n) (defaul t ) . gpo_0: pi n gpio0 out put v a l u e. gpo1en: pin gpio1 output enable. 1: out put i s enabl e d (m eani ng gpio1 i s used as an out put pi n). 0: out put i s t r i - st at ed (m eani ng gpio1 i s used as an i nput pi n) (defaul t ) . gpo_1: pi n gpio1 out put v a l u e. 0: (default). gpo2en: pin gpio2 output enable. 1: out put i s enabl e d (m eani ng gpio2 i s used as an out put pi n). 0: out put i s t r i - st at ed (m eani ng gpio2 i s used as an i nput pi n) (defaul t ) . gpo_2: pi n gpio2 out put v a l u e. 0: (default). rse: relo ad serial eeprom. 1: enable. 0: disabled (default) 6.2.1.23 software reset register (20h, write only) bit7 bit6 bit5 bit4 bit3 b i t 2 b i t 1 bit0 0 1 0 b z pr l pr t e r t r r rr: clear fram e length error for bulk in. 1: set high to clear state. 0: set low to exit clear state (default). r t : clear fram e length error for bulk out. 1: set high to enter clear state. 0: set low to exit clear state (default). pr te: external phy reset pin tri-state enable. 1 : en ab le, i.e., th e ex tern al phyrst_ n p i n is tri-stated (d efau lt). th is allo ws th e phyrst_ n p i n ? s activ e lev e l to be cont rol l e d by ext e rnal pul l e d-up (act i v e hi gh duri ng power-on) or pul l e d-down resi st or (act i v e l o w duri ng power-on). 0: di sabl ed, i . e., t h e ext e rnal phyr st_n pi n?s l e vel i s dri v en by ei t h er pr l bi t or i n t e rnal ?usb r e set? based on th e settin g in scpr b it in flag b y te o f eeprom. pr l: ext e rnal phy r e set pi n level . w h en sc pr bi t = 1 and pr te = 0, t h i s bi t cont rol s t h e out put l e vel of ext e rnal phyr st_n pi n. 1: set t o hi gh (defaul t ) . 0 : set to lo w. bz: fo rce bu lk in to re turn a zero-length packet. 1: software can force bulk in to return a zero-length usb packet. 0: norm al operat i on m ode (defaul t ) . b i t [7: 5 ] : pl ease al way s wri t e 010 t o t h ese bi t s . asix electronics corporation 24 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 6.2.2 remote wakeup description aft e r AX88178 ent e rs i n t o suspend m ode, ei t h er t h e usb host or AX88178 i t s el f can awake i t up and resum e back t o t h e ori g i n al operat i on m ode before i t ent e red suspend. fol l o wi ng t r ut h t a bl e shows t h e chi p set t i ng, wakeup event , and devi ce response support e d by t h i s asic . not e t h at ?x? st ands for don?t - care. s e t t i n g w a k e u p e v e n t d e v i c e aw ak es up? wak e up by r w u bit of flag byte in eepro m set_feature standar d c o mma n d rw l u o f monitor m ode register r w mp o f monitor m ode reg i ster host send resu m e signal receiving mag i c packet extwake up_n pin l i nkup detected on prim ary phy l i nkup detected on secondar y phy host x x x x j -> k y e s d e v i c e 0 0 x x x x x x n o d e v i c e 1 1 0 1 y e s y e s d e v i c e 1 1 1 0 y e s y e s d e v i c e 1 1 1 0 y e s y e s d e v i c e 1 1 x x l o w- pulse y e s table 5: rem o te w a keup t r uth t a ble 6.3 interrupt endpoint the int e rrupt endpoi nt cont ai ns 8 by t e s of dat a and i t s fram e form at i s defi ned as: a100_b b 00_c c dd_eeff. w h ere bb b y te in b y te 3 : bit7 bit6 b i t 5 bit4 bit3 bit2 bit1 b i t 0 r e s e r v e d m d i n t f l e s p l s p p l s ppls: prim arily phy link state. 1: li nk i s up. 0: li nk i s down. spls: secondary phy li nk st at e. 1: li nk i s up. 0: li nk i s down. fle: bulk out ethernet fram e length error. 1: propri e t a ry lengt h fi el d has pari t y error duri ng b u l k out t r ansact i on. 0: propri e t a ry lengt h fi el d has no pari t y error duri ng b u l k out t r ansact i on. m d int: input l e vel of m d int pi n. the m d int pi n can be connect ed t o m d int# pi n of et hernet phy . 1: w h en m d int i nput pi n = 1. 0: w h en m d int i nput pi n = 0. c c dd by t e i n by t e 5 and 6: pri m ary phy ? s regi st er val u e, whose offset i s gi ven i n hi gh by t e of eepr o m offset 0fh. eeff by t e i n by t e 7 and 8: pri m ary phy ? s regi st er val u e, whose offset i s gi ven i n low by t e of eepr o m offset 0fh. asix electronics corporation 25 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 7.0 electrical specifications 7.1 dc characteristics 7.1.1 absolute maximum ratings s y m b o l p a r a m e t e r r a t i n g u n i t vddk di gi t a l core power suppl y - 0.3 t o vddk + 0.3 v vdd2 power suppl y of 2.5v i/ o - 0.3 t o vdd2 + 0.3 v vdd3 power suppl y of 3.3v i/ o - 0.5 t o vdd3 + 0.5 v avddk anal og core power suppl y - 0.3 t o avddk + 0.3 v avdd3 power suppl y of anal og i/ o - 0.5 t o avdd3 + 0.5 v input vol t a ge of 2.5v i/ o - 0.3 t o vdd2 + 0.3 v v in2 input vol t a ge of 2.5v i/ o wi t h 3.3v t o l e rant - 0.3 t o 3.9 v input vol t a ge of 3.3v i/ o - 0.3 t o vdd3 + 0.3 v v in3 input vol t a ge of 3.3v i/ o wi t h 5v t o l e rant - 0.3 t o 5.5 v t stg st orage t e m p erat ure - 40 t o 150 note: perm anent device dam a ge m a y occu r if absolute m a xim u m ratings are exceeded. functional operation should be restricted in the optional sections of this datasheet. exposure to absolute m a xim u m rating condition for extended periods m a y affect d e v i ce reliab ility. 7.1.2 recommended operating condition s y m b o l p a r a m e t e r m i n t y p m a x u n i t vddk di gi t a l core power suppl y 2.25 2.5 2.75 v vdd2 power suppl y of 2.5v i/ o 2.25 2.5 2.75 v vdd3 power suppl y of 3.3v i/ o 3.0 3.3 3.6 v avddk anal og core power suppl y 2.25 2.5 2.75 v avdd3 power suppl y of anal og i/ o 3.0 3.3 3.6 v input vol t a ge of 2.5 v i/ o 0 2.5 2.75 v v in2 input vol t a ge of 2.5 v i/ o wi t h 3.3 v to leran ce 0 2 . 5 3 . 6 v input vol t a ge of 3.3 v i/ o 0 3.3 3.6 v v in3 input vol t a ge of 3.3 v i/ o wi t h 5 v to leran ce 0 3 . 3 5 . 2 5 v t j c o m m e rci a l junct i on operat i ng tem p erature 0 - 1 1 5 t c c o m m e rci a l operat i ng t e m p erat ure 0 - 70 7.1.3 leakage current and capacitance s y m b o l p a r a m e t e r c o n d i t i o n min t yp m a x u n i t i in input current no pul l - up or pul l - down - 10 1 10 a i oz tri-state leakage current -10 1 10 a c in input capaci t a nce - 3.1 - pf c out output capacitance - 3.1 - pf c bid bi-directional buffer capacitance - 3.1 - pf asix electronics corporation 26 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller not e : the capaci t a nce l i s t e d above does not i n cl ude pad cap aci t a nce and package capaci t a nce. one can est i m at e pi n capaci t a nce by addi ng a pad capaci t a nce of about 0.5pf and t h e package capaci t a nce. 7.1.4 dc characteristics of 2.5v i/o pins s y m b o l p a r a m e t e r c o n d i t i o n min t yp m a x u n i t vdd2 power suppl y of 2.5v i/ o 2.25 2.5 2 .75 v tem p j u n c t i on t e m p erat u r e 0 25 1 1 5 vi l input l o w vol t a ge - - 0.7 v vi h input hi gh vol t a ge cmos 1.7 - - v v t - sch m itt trig g e r n e g a tiv e g o i n g t h reshol d vol t a ge 0.7 1 .0 - v v t + sch m itt trig g e r p o s itiv e g o i n g t h reshol d vol t a ge cmos - 1 . 5 1 . 7 v vol out put l o w vol t a ge | i ol | = 2~ 16m a - - 0.4 v voh out put hi gh vol t a ge | i oh| = 2~ 16m a 1.85 - - v r pu input pul l - up resi st ance 40 75 190 k r pd input pul l - down resi st ance 40 75 190 k ii n input l eakage current vi n = vdd2 or 0 -10 1 10 a ioz tri-state output leakage current -10 1 10 a 7.1.5 dc characteristics of 3.3v i/o pins s y m b o l p a r a m e t e r c o n d i t i o n min t yp m a x u n i t vdd3 power suppl y of 3.3v i/ o 3.3v i/ o 3.0 3 .3 3.6 v tem p j u n c t i on t e m p erat u r e 0 25 1 1 5 vi l input l o w vol t a ge - - 0.8 v vi h input hi gh vol t a ge lvttl 2.0 - - v v t - sch m itt trig g e r n e g a tiv e g o i n g t h reshol d vol t a ge 0.8 1 .1 - v v t + sch m itt trig g e r p o s itiv e g o i n g t h reshol d vol t a ge lvttl - 1 . 6 2 . 0 v vol out put l o w vol t a ge | i ol | = 2~ 16m a - - 0.4 v voh out put hi gh vol t a ge | i oh| = 2~ 16m a 2.4 - - v r pu input pul l - up resi st ance 40 75 190 k r pd input pul l - down resi st ance 40 75 190 k ii n input l eakage current vi n = vdd3 or 0 -10 1 10 a ioz tri-state output leakage current -10 1 10 a 7.2 pow er consumption s y m b o l d e s c r i p t i o n c o n d i t i o n min t y p m a x units i vddk2 current consum ption of v d d k / v d d 2 , 2.5v - 4 8 . 3 - m a i vdd3 current consum ption of vdd3, 3.3v - < 1 - m a i avddk current consum ption of avddk, 2.5v - < 2 - m a i avdd3 current consum ption of avdd3, 3.3v operating at ethernet 1000m bps ful l dupl ex m ode and usb hi gh speed m ode - 5 1 . 1 - m a jc therm a l resi st ance of junct i on t o case 16.5 c / w ja th erm a l resistan ce o f j u n c tio n to am b i en t s till air 4 6 c/w asix electronics corporation 27 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 7.3 pow er-up sequence at power-up, AX88178 requi res t h e vdd3/ avdd3 power suppl y t o ri se t o nom i n al operat i ng vol t a ge wi t h i n tri s e3 and t h e vddk/ avdd2/ avddk power suppl y t o ri se t o nom i n al operat i ng vol t a ge wi t h i n tri s e2. tdelay32 trise2 trise3 3.3v vdd3/avdd3 0v 2.5v vddk/vdd2/avddk 0v s y m b o l p a r a m e t e r c o n d i t i o n m i n t y p m a x u n i t t rise3 3.3v power suppl y ri se t i m e from 0v t o 3.3v - - 10 m s t rise2 2.5v power suppl y ri se t i m e from 0v t o 2.5v - - 10 m s t delay 3 2 3.3v ri se t o 2.5v ri se t i m e del a y -5 - 5 m s 7.4 ac timing characteristics 7.4.1 clock timing 7.4.1.1 xin12m t p_xin12m t h_xin12m t l_xin12m t r_xin12m t f_xin12m v ih v il s y m b o l p a r a m e t e r c o n d i t i o n min t y p m a x u n i t t p_xin12m xin12m cl ock cy cl e t i m e - 83.33 - ns t h_xin12m xin12m cl ock hi gh t i m e - 41.6 - ns t l_xin12m xin12m cl ock l o w t i m e - 41.6 - ns t r_xin12m xin12m rise tim e v il (m ax) to v ih (m i n ) - - 1 . 0 n s t f_xin12m xin1 2 m fall tim e v ih (m in) to v il (m ax) - - 1 . 0 n s asix electronics corporation 28 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 7.4.1.2 xin125m t p_xin125m t h_xin125m t l_xin125m t r_xin125m t f_xin125m v ih v il s y m b o l p a r a m e t e r c o n d i t i o n min t y p m a x u n i t t p_xin125m xin125m cl ock cy cl e t i m e 7.5 8.0 8.5 ns t h_xin125m xin125m cl ock hi gh t i m e 2.5 4.0 - ns t l_xin125m xin125m cl ock l o w t i m e 2.5 4.0 - ns t r_xin125m xin125m ri se t i m e v il (m ax) to v ih (m i n ) - - 1 . 0 n s t f_xin125m xin125m fal l t i m e v ih (m in) to v il (m ax) - - 1 . 0 n s 7.4.2 reset timing xin12m reset_n s y m b o l d e s c r i p t i o n m i n typ m a x u n i t s trst reset pulse width (6ms ~10ms) after xin12m is running 72000 - - xin12m cl ock cy cl e 7.4.3 gmii timing (1000mbps) ttclk ttch ttcl gtx_clk tts tth txd [7:0] tx_en, tx_er trs t s y m b o l d e s c r i p t i o n m i n t y p m a x u n i t s ttclk gtx_clk clock cy cle tim e 7 . 5 8 . 0 8 . 5 n s ttch gtx_clk clock high time 2 . 5 4 . 0 - n s ttcl gtx_clk clock low time 2 . 5 4 . 0 - n s tts txd [7:0] , tx_en, tx_er setup time 4 . 0 - - n s tth txd [:0] , tx_en, tx_er hold time 0 . 5 - - n s asix electronics corporation 29 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller trclk trch trcl rx_ c lk trs trh rxd [7:0] rx_ dv, rx_ e r s y m b o l d e s c r i p t i o n m i n t y p m a x u n i t s trclk rx_clk clock cy cle tim e 7 . 5 8 . 0 8 . 5 n s trch rx_clk clock high time 2 . 5 4 . 0 - n s trcl rx_clk clock low time 2 . 5 4 . 0 - n s trs rxd [7:0] , rx_dv, and rx_er setup time 2 . 0 - - n s trh rxd [7:0] , rx_dv, and rx_er hold time 0 . 0 - - n s 7.4.4 rgmii timing ttclk ttch ttcl txc t skew t t skew t txd [3:0] tx_en (tx_ctl) tx_en tx_er txd [3:0] txd [7:4] txc txd [3:0] , tx_en (tx_ctl) < 500 p s < 500 p s < 500 p s < 500 p s asix electronics corporation 30 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller trclk trch trcl trsu trhd rxd [3:0] rxd [7:4] rx_dv rx_er trsu trhd rx_clk (rxc) rxd [3:0] rx_dv (rx_ctl) symbol d e s c r i pti o n mi n t y p m a x uni t s ttclk txc clock cy cle time at 1000mbps *1 7.2 8 . 0 8 . 8 n s ttch txc clock high time at 1000mbps *2 - 4 . 0 - n s ttcl txc clock low time at 1000mbps *2 - 4 . 0 - n s t sk ew t txc clock to txd [3:0] and tx_en output skew (at transm itter) -500 - 5 0 0 p s trclk rx_clk (rxc) clock cy cle time at 1000mbps *1 7.2 8 . 0 8 . 8 n s trch rx_clk (rxc) clock high time at 1000mbps *2 - 4 . 0 - n s trcl rx_clk (rxc) clock low time at 1000mbps *2 - 4 . 0 - n s trsu r xd [3: 0 ] and r x _dv (r x_c tl) t o r x _c lk (r xc ) cl ock set up t i m e 1 .0 - - ns trhd r xd [3: 0 ] and r x _dv (r x_c tl) t o r x _c lk (r xc ) cl ock hol d t i m e 1 .0 - - ns *1: for 10m bps and 100m bps, tt cl k and trcl k shal l s cal e t o 400ns+/ -40ns and 40ns+/ -4ns respect i v el y . *2: for 10m bps and 100m bps, t h e t y pi cal val u e of tt ch, tt cl , trch, and trcl shal l scal e t o 200ns and 20ns respect i v el y . 7.4.5 mii timing (100mbps) ttclk ttch ttcl tx_clk tts tth txd [3:0] tx_en, tx_er s y m b o l d e s c r i p t i o n m i n t y p m a x u n i t s ttclk tx_clk clock cy cle tim e *1 - 4 0 . 0 - n s ttch tx_clk clock high time *2 - 2 0 . 0 - n s ttcl tx_clk clock low time *2 - 2 0 . 0 - n s tts txd [3:0] , tx_en, tx_er setup time 2 8 . 0 - - n s tth txd [3:0] , tx_en, tx_er hold time 5 . 0 - - n s asix electronics corporation 31 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller trclk trch trcl rx_ c lk trs trh rxd [3:0] rx_ dv, rx_ e r s y m b o l d e s c r i p t i o n m i n t y p m a x u n i t s trclk rx_clk clock cy cle tim e *1 - 4 0 . 0 - n s trch rx_clk clock high time *2 - 2 0 . 0 - n s trcl rx_clk clock low time *2 - 2 0 . 0 - n s trs rxd [3:0] , rx_dv, and rx_er setup time 3 . 0 - - n s trh rxd [3:0] , rx_dv, and rx_er hold time 0 . 5 - - n s *1: for 10m bps, t h e t y pi cal val u e of tt cl k and trcl k shal l scal e t o 400ns. *2: for 10m bps, t h e t y pi cal val u e of tt ch, tt cl , trch, and trcl shal l scal e t o 200ns. 7.4.6 station management timing mdc to d tclk tch tcl th ts m d io (as out put ) m d io (as i nput ) s y m b o l d e s c r i p t i o n m i n t y p m a x u n i t s tcl k m d c cl ock cy cl e t i m e - 666 - ns tch m d c cl ock hi gh t i m e - 333 - ns tcl m d c cl ock l o w t i m e - 333 - ns tod m d c cl ock fal l i ng edge t o m d io out put del a y 0 - 2 ns ts m d io dat a i nput set up t i m e 10 - - ns th m d io dat a i nput hol d t i m e 0 - - ns asix electronics corporation 32 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 7.4.7 serial eeprom timing tch data valid ts th thcs tlcs tscs valid valid tdv tod tcl tclk eeck eedi (out put ) eecs eedo (i nput ) s y m b o l d e s c r i p t i o n m i n t y p m a x u n i t s tcl k eec k cl ock cy cl e t i m e - 5333 - ns tch eec k cl ock hi gh t i m e - 2666 - ns tcl eec k cl ock l o w t i m e - 2666 - ns tdv eedi out put val i d t o eec k ri si ng edge t i m e 2666 - - ns tod eec k ri si ng edge t o eedi out put del a y t i m e 2666 - - ns tscs eec s out put val i d t o eec k ri si ng edge t i m e 2666 - - ns thcs eec k fal l i ng edge t o eec s i nval i d t i m e 0 - - ns tl cs m i ni m u m eec s l o w t i m e 23904 - - ns ts eedo i nput set up t i m e 10 - - ns th eedo i nput hol d t i m e 100 - - ns asix electronics corporation 33 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 8.0 package information b e d hd e he pin 1 a2 a1 l l1 a millimeter symbol min ty p max a1 0.05 - - a2 1.35 1.40 1.45 a - - 1.60 b 0.13 0.18 0.23 d 13.90 14.00 14.10 e 13.90 14.00 14.10 e - 0.4 bsc - hd 15.85 16.00 16.15 he 15.85 16.00 16.15 l 0.45 0.60 0.75 l1 - 1.00 ref - 0 3.5 7 asix electronics corporation 34 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller 9.0 ordering information a x 8 8 1 7 8 l f product name package lqfp lead free asix electronics corporation 35 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller appendix a: system applications som e typical applications fo r AX88178 are illustrated bellow. a.1 usb to gigabit ethernet converter a.2 usb to gigabit ethernet and/or hom e lan com b o solution usb i/f 10/ 100/ 1000 m bps ethernet phy m agnetic r j 45 hom e lan phy m agnetic rj1 1 eeprom r j 45 m agnetic 10/ 100/ 1000 ethernet phy AX88178 usb i/f eeprom AX88178 asix electronics corporation 36 AX88178 usb to 10/100/1000 gigabit ethernet/homepna controller revision history revision date comment v 0 . 1 1 / 5 / 0 4 in itial release. v 0.2 4/ 16/ 04 added power consum pt i on da t a and updat e d pi n descri pt i on for pi n usb_speed_led. v 0.3 8/ 9/ 04 c h anged b u l k in t r ansfer t o endpoi nt 2 and b u l k out t r ansfer t o endpoi nt 3 i n sect i on 5.3. v 0.4 12/ 23/ 04 added t h erm a l dat a i n sect i on 7.2. v 0.5 1/ 6/ 05 added operat i ng t e m p erat ure i n feat ure and sect i on 7.1.2. v 0.6 3/ 23/ 05 added power-up sequence i n sect i on 7.3. v 0.7 6/21/05 changed the support to 1 usb interface in section 5.2. 4f, no. 8, hsin ann rd., science-based industrial park, hsinchu, taiw an, r.o.c. tel: 886-3-5799500 fax: 886-3-5799558 email: support@asix.com.tw web: http://www.asix.com .tw/ 37 |
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